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 NTD4805N Power MOSFET
30 V, 88 A, Single N-Channel, DPAK/IPAK
Features
* * * *
Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Optimized Gate Charge to Minimize Switching Losses These are Pb-Free Devices
V(BR)DSS 30 V
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RDS(on) MAX 5.0 mW @ 10 V 7.4 mW @ 4.5 V D ID MAX 88 A
Applications
* CPU Power Delivery * DC-DC Converters * Low Side Switching
MAXIMUM RATINGS (TJ = 25C unless otherwise noted)
Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current (RqJA) (Note 1) Power Dissipation (RqJA) (Note 1) Continuous Drain Current (RqJA) (Note 2) Power Dissipation (RqJA) (Note 2) Continuous Drain Current (RqJC) (Note 1) Power Dissipation (RqJC) (Note 1) Pulsed Drain Current tp=10ms Current Limited by Package TA = 25C TA = 85C TA = 25C TA = 25C Steady State TA = 85C TA = 25C TC = 25C TC = 85C TC = 25C TA = 25C TA = 25C PD IDM IDmaxPkg TJ, Tstg IS dV/dt EAS PD ID PD ID Symbol VDSS VGS ID Value 30 "20 16 12.6 2.24 12.6 9.8 1.35 88 68 66 175 45 -55 to 175 55 6.0 288 W A A C A V/ns mJ W A W Unit V V A
N-Channel G S 4 4 4
A 12 3 CASE 369C DPAK (Bend Lead) STYLE 2 1 23 1
2 3 CASE 369AC CASE 369D 3 IPAK DPAK (Straight Lead) (Straight Lead) STYLE 2
MARKING DIAGRAMS & PIN ASSIGNMENTS
4 Drain YWW 48 05NG 4 Drain YWW 48 05NG 4 Drain YWW 48 05NG
Operating Junction and Storage Temperature Source Current (Body Diode) Drain to Source dV/dt Single Pulse Drain-to-Source Avalanche Energy (VDD = 30 V, VGS = 10 V, L = 1.0 mH, IL(pk) = 24 A, RG = 25 W) Lead Temperature for Soldering Purposes (1/8 from case for 10 s)
TL
260
C
2 1 23 1 Drain 3 Gate Source Gate Drain Source 1 2 3 Gate Drain Source Y WW 4805N G = Year = Work Week = Device Code = Pb-Free Package
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2006
1
April, 2006 - Rev. 0
Publication Order Number: NTD4805N/D
NTD4805N
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter Junction-to-Case (Drain) Junction-to-TAB (Drain) Junction-to-Ambient - Steady State (Note 1) Junction-to-Ambient - Steady State (Note 2) 1. Surface-mounted on FR4 board using 1 in sq pad size, 1 oz Cu. 2. Surface-mounted on FR4 board using the minimum recommended pad size. Symbol RqJC RqJC-TAB RqJA RqJA Value 2.25 3.5 67 111 Unit C/W
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted)
Parameter OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Drain-to-Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current V(BR)DSS V(BR)DSS/TJ IDSS VGS = 0 V, VDS = 24 V TJ = 25C TJ = 125C VGS = 0 V, ID = 250 mA 30 27 1.0 10 "100 nA V mV/C mA Symbol Test Condition Min Typ Max Unit
Gate-to-Source Leakage Current ON CHARACTERISTICS (Note 3) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain-to-Source On Resistance
IGSS
VDS = 0 V, VGS = "20 V
VGS(TH) VGS(TH)/TJ RDS(on)
VGS = VDS, ID = 250 mA
1.5 5.86
2.5
V mV/C
VGS = 10 to 11.5 V VGS = 4.5 V
ID = 30 A ID = 15 A ID = 30 A ID = 15 A
4.3 4.2 6.0 5.8 17
5.0
mW
7.4
Forward Transconductance CHARGES AND CAPACITANCES Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Total Gate Charge SWITCHING CHARACTERISTICS (Note 4) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time
gFS
VDS = 15 V, ID = 15 A
S
Ciss Coss Crss QG(TOT) QG(TH) QGS QGD QG(TOT) VGS = 11.5 V, VDS = 15 V, ID = 30 A VGS = 4.5 V, VDS = 15 V, ID = 30 A VGS = 0 V, f = 1.0 MHz, VDS = 12 V
2865 610 338 20.5 4.05 8.28 8.36 48 26
pF
nC
nC
td(on) tr td(off) tf td(on) tr td(off) tf VGS = 11.5 V, VDS = 15 V, ID = 30 A, RG = 3.0 W VGS = 4.5 V, VDS = 15 V, ID = 30 A, RG = 3.0 W
18.3 101.5 16.3 10.6 8.1 23.1 27.1 5.7
ns
ns
3. Pulse Test: Pulse Width 300 ms, Duty Cycle 2%. 4. Switching characteristics are independent of operating junction temperatures.
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NTD4805N
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted)
Parameter DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD VGS = 0 V, IS = 30 A TJ = 25C TJ = 125C 0.87 0.76 25.7 VGS = 0 V, dIs/dt = 100 A/ms, IS = 30 A 13.1 12.6 18 nC ns 1.2 V Symbol Test Condition Min Typ Max Unit
Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Time PACKAGE PARASITIC VALUES Source Inductance Drain Inductance, DPAK Drain Inductance, IPAK Gate Inductance Gate Resistance
tRR ta tb QRR
LS LD LD LG RG TA = 25C
2.49 0.0164 1.88 3.46 0.8
nH
W
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NTD4805N
TYPICAL PERFORMANCE CURVES
110 ID, DRAIN CURRENT (AMPS) 100 90 80 70 60 50 40 30 20 10 0 0 1 2 3 4 3.2 V 3V 2.8 V 5 3.4 V 180 3.8 V 3.6 V ID, DRAIN CURRENT (AMPS) 6V 5V 4.5 V 4V 160 140 120 100 80 60 40 20 0 0 1 2 3 TJ = 125C TJ = 25C TJ = -55C 4 5 6 VDS 10 V
10 V
VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
Figure 1. On-Region Characteristics
RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W)
Figure 2. Transfer Characteristics
0.045 0.040 0.035 0.030 0.025 0.020 0.015 0.010 0.005 0 3 4 5 6 7 8 9 10 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) ID = 30 A TJ = 25C
0.01 0.009 0.008 0.007 0.006 0.005 0.004 0.003 0.002 0.001 0 30 35 40 45 50 55 60 65 70 75 80 85 90 VGS = 11.5 V VGS = 4.5 V TJ = 25C
ID, DRAIN CURRENT (AMPS)
Figure 3. On-Resistance vs. Gate-to-Source Voltage
RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 2.0 ID = 30 A VGS = 10 V 1.5 IDSS, LEAKAGE (nA) 10,000 100,000
Figure 4. On-Resistance vs. Drain Current and Gate Voltage
VGS = 0 V TJ = 175C
1000
TJ = 125C
1.0
100
0.5 -50 -25
10 0 25 50 75 100 125 150 175 5 10 15 20 25 TJ, JUNCTION TEMPERATURE (C) VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Figure 5. On-Resistance Variation with Temperature
Figure 6. Drain-to-Source Leakage Current vs. Drain Voltage
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NTD4805N
TYPICAL PERFORMANCE CURVES
5000 7 6 5 4 3 2 1 0 0 ID = 30 A VGS = 4.5 V TJ = 25C 5 10 15 20 QG, TOTAL GATE CHARGE (nC) 25 Q1
VDS = 0 V VGS = 0 V Ciss
TJ = 25C
C, CAPACITANCE (pF)
4000
VGS , GATE-TO-SOURCE VOLTAGE (VOLTS)
QT Q2
3000
Ciss
2000
Crss
1000 0 10 Crss 5 VGS 0 VDS 5 10 15 20
Coss
25
GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
1000 IS, SOURCE CURRENT (AMPS) VDD = 15 V ID = 30 A VGS = 11.5 V t, TIME (ns) 100 td(off) tr 10 td(on) tf 30
Figure 8. Gate-To-Source and Drain-To-Source Voltage vs. Total Charge
VGS = 0 V 25 20 15 10 5 0 0.5 TJ = 25C
1 1 10 RG, GATE RESISTANCE (OHMS) 100
0.8 0.9 0.6 0.7 VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
1.0
Figure 9. Resistive Switching Time Variation vs. Gate Resistance
EAS, SINGLE PULSE DRAIN-TO-SOURCE AVALANCHE ENERGY (mJ) 1000 I D, DRAIN CURRENT (AMPS) 450 400 350 300 250 200 150 100 50 0 25
Figure 10. Diode Forward Voltage vs. Current
ID = 29 A
100
10 ms 100 ms
10
1 ms VGS = 20 V SINGLE PULSE TC = 25C RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 1 10 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 100 10 ms dc
1
0.1
50 75 100 125 150 TJ, JUNCTION TEMPERATURE (C)
175
Figure 11. Maximum Rated Forward Biased Safe Operating Area
Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature
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NTD4805N
TYPICAL PERFORMANCE CURVES
100 I D, DRAIN CURRENT (AMPS) 125C 100C 25C
10
1
1
10 100 PULSE WIDTH (ms)
1000
Figure 13. Avalanche Characteristics
r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED)
1.0 D = 0.5
0.2 0.1 0.1 0.05 0.02 0.01 SINGLE PULSE 0.01 1.0E-05 t1 t2 DUTY CYCLE, D = t1/t2 1.0E-03 1.0E-02 t, TIME (ms) P(pk) RqJC(t) = r(t) RqJC D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) - TC = P(pk) RqJC(t)
1.0E-04
1.0E-01
1.0E+00
1.0E+01
Figure 14. Thermal Response
ORDERING INFORMATION
Order Number NTD4805NT4G NTD4805N-1G NTD4805N-35G Package DPAK (Pb-Free) IPAK (Pb-Free) IPAK Trimmed Lead (3.5 " 0.15 mm) (Pb-Free) Shipping 2500 Tape & Reel 75 Units/Rail
75 Units/Rail
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
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NTD4805N
PACKAGE DIMENSIONS
DPAK CASE 369C-01 ISSUE O
-T- B V R
4 SEATING PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.180 BSC 0.034 0.040 0.018 0.023 0.102 0.114 0.090 BSC 0.180 0.215 0.025 0.040 0.020 --- 0.035 0.050 0.155 --- MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 4.58 BSC 0.87 1.01 0.46 0.58 2.60 2.89 2.29 BSC 4.57 5.45 0.63 1.01 0.51 --- 0.89 1.27 3.93 ---
C E
A S
1 2 3
Z U
K F L D 2 PL G 0.13 (0.005)
M
J H T
DIM A B C D E F G H J K L R S U V Z
SOLDERING FOOTPRINT*
6.20 0.244 2.58 0.101 5.80 0.228 1.6 0.063 6.172 0.243 3.0 0.118
SCALE 3:1
mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
3 IPAK, STRAIGHT LEAD CASE 369AC-01 ISSUE O
NOTES: 1.. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2.. CONTROLLING DIMENSION: INCH. 3. SEATING PLANE IS ON TOP OF DAMBAR POSITION. 4. DIMENSION A DOES NOT INCLUDE DAMBAR POSITION OR MOLD GATE. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.043 0.090 BSC 0.034 0.040 0.018 0.023 0.134 0.142 0.180 0.215 0.035 0.050 0.000 0.010 MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.09 2.29 BSC 0.87 1.01 0.46 0.58 3.40 3.60 4.57 5.46 0.89 1.27 0.000 0.25
B V R
C E
A
SEATING PLANE
W F G
K J H D
3 PL
0.13 (0.005) W
DIM A B C D E F G H J K R V W
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NTD4805N
PACKAGE DIMENSIONS
DPAK CASE 369D-01 ISSUE B
C E
DIM A B C D E F G H J K R S V Z NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 --- MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 ---
B V R
4
Z A
3
S -T-
SEATING PLANE
1
2
K
F D G
3 PL
J H 0.13 (0.005)
M
T
STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: N. American Technical Support: 800-282-9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082-1312 USA Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada Phone: 81-3-5773-3850 Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.
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NTD4805N/D


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